SN74HC74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
The 'HC74 devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
 
Specifications
 
3-State Output
No
Voltage(Nom)(V)
3.3,5
Output Drive (IOL/IOH)(Max)(mA)
5.2/-5.2
ICC @ Nom Voltage(Max)(mA)
0.04
F @ Nom Voltage(Max)(Mhz)
28
Operating Temperature Range(C)
-40 to 85
Technology Family
HC
Package Group
PDIP,SO,SOIC,SSOP,TSSOP
Rating
Catalog
Schmitt Trigger
No
VCC(Max)(V)
6
VCC(Min)(V)
2
tpd @ Nom Voltage(Max)(ns)
37